Spanning 15 weeks, our project set out to improve the detection of light data from VERITAS. VERITAS uses the four IACTs to detect Cherenkov light pulses, which are produced when gamma rays interact with the earth’s atmosphere. It utilizes a three-level trigger system to discern between Night Sky Background and Cherenkov light pulses, since the Night Sky Background crowds the cameras with photons. Once the three-level trigger criteria is met, the data is stored to a disk while the new samples temporarily stop buffering. Consequently, the light monitoring is not continuous and storing the data incurs some amount of deadtime. Additionally, VERITAS’ three-level trigger system only allows for short Cherenkov light pulse samples, causing a low duty cycle of less than 20%. To improve and account for the samples of deadtime that currently occurs, we wanted to sample the light with less noise and frequency. Given that goal in mind, this project aims to create an FPGA-based system to execute fast running calculations of the variance of the digitized light signals, known as the pedestal variance. We also wanted to calculate the pedestal variance at a low frequency in order to improve the sensitivity of the normal gamma ray detection of VERITAS. Effective hardware needed to optimize power consumption and logic size in order to calculate the pedestal variance and process each sample before the next one arrives. To execute calculations quickly, we developed three possible computation schemas: a parallelized schema, a parallelized-pipelined schema, and a multi-level parallelized-pipelined schema. Approximately ten samples were used in MATLAB to verify a schema. Of the three, the parallelized schema constructed in Verilog verified it works for tested data. For more information about our findings, please read our results.