Abstract

VERITAS uses the four IACTs to detect Cherenkov light pulses, which are produced when gamma rays interact with the earth’s atmosphere. It utilizes a three-level trigger system to discern between Night Sky Background and Cherenkov light pulses, since the Night Sky Background crowds the cameras with photons. Once the three-level trigger criteria is met, the data is stored to a disk while the new samples temporarily stop buffering. Consequently, the light monitoring is not continuous and storing the data incurs some amount of deadtime. Additionally, VERITAS’ three-level trigger system only allows for short Cherenkov light pulse samples, causing a low duty cycle of less than 20%. This project aims to create an FPGA-based system to execute fast running calculations of the variance of the digitized light signals, known as the pedestal variance. Effective hardware needed to optimize power consumption and logic size in order to calculate the pedestal variance and process each sample before the next one arrives. To execute calculations quickly, three possible computation schemes were designed: parallelized, parallelized-pipelined, and a multi-level parallelized-pipelined. Approximately ten samples were used in MATLAB to verify a schema. Of the three, the parallelized schema constructed in Verilog verified it works for tested data.