Fully Assembled Module:
Following assembly and hardware verification we are able to confirm the completion of our hardware. Our completed front panel and main circuit board are shown above connected by headers along the side. Using two rows of header pin connectors along the sides of our module both allowed for structural integrity and easier assembly. However, certain hardware debugging tasks proved to be more difficult given the physical inability to access the main components and CPU reset button.
Sample Rate:
Using an oscilloscope, we are able to measure the single channel sampling rate for our implementation of a VCO. Using a lookup table, we are able to approximate a sine wave using 65536 samples. When each sample is processed, a corresponding command is sent to the DAC and the output voltage of the desired channel is updated. Sampling rate is the speed at which the system can output different samples therefore we are able to measure this by the time a given sample is maintained before updating. Our measurement is shown above on our oscilloscope. The period of time a sample is held (BX-AX) was measured to be 31.60us, therefore the sampling rate for a single channel is 31.64kHz. Compared to the standard lower limit for high definition audio, 44.1kHz, we can qualitatively categorize our system as capable of medium quality audio. When considering the operation of the DAC across all 8 channels, as well as the ADC across all 8 channels, we can approximate the overall sampling rate to be 506kHz.
Voltage Controlled Oscillator (VCO) Firmware:
We verified the functionality of the VCO by first booting the module up and probing the first channel’s output. As expected, we measured a sine output, seen above, set to a specific frequency determined by channel 1’s potentiometer, known as the center frequency. We then fed an input voltage into channel 1’s input, and observed the output frequency of channel 1 increasing and decreasing with the voltage level present at the channel’s input, confirming the correct operation of the firmware. This module is functionally equivalent to a frequency modulator.
Voltage Controlled Amplifier (VCA) Firmware:
We verified the functionality of the VCA by feeding sine wave audio signals into channel 1 and channel 2’s inputs, with the first channel’s frequency being a decade higher than that of the second channel’s. As expected, the output of channel 1 saw the first input frequency controlling the amplitude of the second input frequency. This module is functionally equivalent to an amplitude modulator.
Mixer Firmware:
We verified the functionality of the Mixer by feeding sine wave audio signals into channel 1 and channel 2’s inputs, with the first channel’s frequency being double that of the second channel’s. As expected, the output of channel 1 saw the two input frequencies superimposed on one another. Utilizing our oscilloscope’s FFT functionality, we were able to observe both frequency peaks present in our output waveform.
Delay Line Firmware:
We verified the functionality of the Delay line by feeding a pulse signal into the input of the module, and measuring the time it took to see the pulse on the output. Each channel was given a buffer of 30,000 samples, meaning we expected to measure the pulse approximately 1 second after sending it. This operation was confirmed by listening to the input and output waveforms and measuring the time difference via a stopwatch, which confirmed the 1 second delay time.
IIR Firmware:
Unfortunately, due to a COVID illness late in the semester, we did not have enough time to complete the IIR firmware. We were unable to enter the EE laboratory we typically did testing in due to isolation guidelines, and could not test any of our prototype IIR firmwares.
Areas for future improvement:
After completing the prototype and firmwares, we have identified 4 areas we could improve and/ or expand upon:
- Fixing PCB layout mistakes
- During our time troubleshooting our hardware, we identified a handful of routing errors on our physical board. Even though we were able to use bodge wires and extra components to rectify these errors, any further re-designs of the board should be updated to reflect these changes.
- Reducing ADC signal noise
- One unexpected obstacle during our firmware development was the large amount of noise present at the input of the ADC’s. Further revisions of our board should probably include low pass filters (with a cutoff of around 30kHz) to remove high frequency noise that may affect measurements.
- Improve sample rates
- While 31.25kHz per channel is a decent sample rate, most audio circuits are expected to have a bandwidth at a minimum of 44.1kHz. Further improvements could come from overclocking the RP2040 or utilizing a faster SPI algorithm.
- Utilize Higher Quality ADC’s
- While 12 bit audio is of decent quality, most audio applications expect 16 bit audio. In future board revisions, a 16 bit DAC and ADC will be used.
