Helping to develop an HLS benchmark suite for graph algorithms implemented on FPGA-based platforms

FPGA | Support

The goal of this capstone project is to build 4 different graph algorithms using Python in serial programming model and 4 corresponding HLS kernels using C in GAS programming model inside the HLS benchmark suite. With our careful selection of graphs regarding the Power law, they are implemented to the HLS kernels. By using OpenMP, Xilinx Vivado HLS, and their corresponding pragmas, we are able to see how HLS has been used to speed up the kernels. Since this is an unfinished project, open source code is not provided here. Feel free to contact us if you are interested in our code.

Our Team


  • Huitian Xia(ESE department)
  • Jian Gao(ESE department)


  • Dr. Wang(Dorothy)
  • Dr. Zhang(Silvia)
  • Dr. Chamberlain
  • PhD Candidate Chenfeng Zhao