Pricing path-dependent Options remains very computationally draining and challenging. In order to find the cost of barrier Options, a large number of stock price paths must be generated to reveal the expected payoff of the Option. Currently, these Options can be relatively easily priced using CPUs, but unfortunately the run-time of the programs is very slow and if many Options have to be priced by a single CPU, it may not be feasible in a short time frame. Using Field-Programmable Gate Arrays (FPGAs), we hope to achieve a 1000x speed-up over typical CPUs. Coding in VHDL, we will construct stock price pathways and iterate the process a large number of times such that we have an accurate ending stock price and can calculate the Option premium. We have recorded computing times for CPUs using MATLAB and C, and will use these values as benchmarks for our FPGAs performance.