Overview
The goal of this project was to create a hardware implementation of the data pipeline for the ADAPT, Antarctic Demonstrator for the Advanced Particle-astrophysics Telescope, research group involving the Departments of Computer Engineering, Electrical Engineering, and Physics and Washington University in St. Louis as well as other universities and organizations around the world. This pipeline will eventually be implemented on a field-programmable gate array (FPGA) that processes gamma-ray bursts detected by the telescope. The hardware pipeline can be seen in figure 1.
About
Our project aims to develop a hardware design in VHDL that implements the data preprocessing functions: pedestal subtraction and integration. The project is an extension of the work done by the Advanced Particle-astrophysics Telescope (APT) collaboration in Washington University in St. Louis . We developed a design for the memory to be used, pedestal subtraction module, and integration module in VHDL. There are 16 channels per ALPHA ASIC and each channel has 256 samples. Each sample is collected by the ASIC in 10ns. Thus, the optimal latency would be 2.56us. There should also be 12 ASICs supported by the FPGA board, allowing for the processing of either the x or y axis of a layer in our detector. A version of the flight instrument can be seen below in figure 2. The FPGA to be used for the instrument is from the Kintex-7 family, FPGA part XC7K325T-2FFG676I. Due to access limitations, we used the FPGA part XC7K70TFBG484-3, smaller than the FPGA part to be used and a part of the Kintex-7 family. Our design will utilize its local memory (block random access and first in first out memories) to store data for more feasible access of it throughout the APT hardware pipeline. Our HDL design can be tested by running the testing workbench of each module to test each design’s functionality. Further information of the memory, pedestal subtraction, and integration modules can be found here:
Poster
References
[1] Konst, Meagan. “Applying HLS to FPGA Data Preprocessing in the Advanced Particle- Astrophysics TelescopeApplying HLS to FPGA Data Preprocessing in the Advanced Particle-Astrophysics Telescope.” Washington University in St. Louis, 2022, pp. 1–33.